intel-intrinsics 1.9.1
Use SIMD intrinsics with Intel syntax, with any D compiler, targetting x86 or arm. Like simde but for D.
To use this package, run the following command in your project's root directory:
Manual usage
Put the following dependency into your project's dependences section:
intel-intrinsics
intel-intrinsics
is the SIMD library for D.
intel-intrinsics
lets you use SIMD in D with support for LDC / DMD / GDC with a single syntax and API: the x86 Intel Intrinsics API that is also used within the C, C++, and Rust communities.
intel-intrinsics
is most similar to simd-everywhere, it can target AArch64 for full-speed with Apple Silicon, and also 32-bit ARM for the Raspberry Pi.
"dependencies":
{
"intel-intrinsics": "~>1.0"
}
Features
SIMD intrinsics with _mm_
prefix
DMD x86/x86_64 | LDC x86/x86_64 | LDC arm64/arm32 | GDC x86_64 | |
---|---|---|---|---|
MMX | Yes but slow (#42) | Yes | Yes | Yes |
SSE | Yes but slow (#42) | Yes | Yes | Yes |
SSE2 | Yes but slow (#42) | Yes | Yes | Yes |
SSE3 | Yes but slow (#42) | Yes (use -mattr=+sse3) | Yes | Yes but disabled (#39) |
SSSE3 | Yes but slow (#42) | Yes (use -mattr=+ssse3) | Yes | Yes but disabled (#39) |
SSE4.1 | Yes but slow (#42) | Yes (use -mattr=+sse4.1) | Yes | Yes but disabled (#39) |
SSE4.2 | Yes but slow (#42) | Yes (use -mattr=+sse4.2) | Yes (use -mattr=+crc) | Yes but disabled (#39) |
BMI2 | Yes but slow (#42) | Yes (use -mattr=+bmi2) | Yes but slow (#83) | Yes but disabled (#39) |
The intrinsics implemented follow the syntax and semantics at: https://software.intel.com/sites/landingpage/IntrinsicsGuide/
The philosophy (and guarantee) of intel-intrinsics
is:
intel-intrinsics
generates optimal code else it's a bug.- No promise that the exact instruction is generated, because it's often not the fastest thing to do.
- Guarantee that the semantics of the intrinsic is preserved, above all other consideration (even at the cost of speed). See image below.
SIMD types
intel-intrinsics
define the following types whatever the compiler and target:
long1
, float2
, int2
, short4
, byte8
, float4
, int4
, double2
though most of the time you should deal with
alias __m128 = float4;
alias __m128i = int4;
alias __m128d = double2;
alias __m64 = long1;
Vector Operators for all
intel-intrinsics
implements Vector Operators for compilers that don't have __vector
support (DMD with 32-bit x86 target). It doesn't provide unsigned vectors though.
Example:
__m128 add_4x_floats(__m128 a, __m128 b)
{
return a + b;
}
is the same as:
__m128 add_4x_floats(__m128 a, __m128 b)
{
return _mm_add_ps(a, b);
}
Individual element access
It is recommended to do it in that way for maximum portability:
__m128i A;
// recommended portable way to set a single SIMD element
A.ptr[0] = 42;
// recommended portable way to get a single SIMD element
int elem = A.array[0];
Why intel-intrinsics
?
- Portability
It just works the same for DMD, LDC, and GDC.
When using LDC,
intel-intrinsics
allows to target AArch64 and 32-bit ARM with the same semantics. - Capabilities
Some instructions just aren't accessible using
core.simd
andldc.simd
capabilities. For example:pmaddwd
which is so important in digital video. Some instructions need an almost exact sequence of LLVM IR to get generated.ldc.intrinsics
is a moving target and you need a layer on top of it. - Familiarity Intel intrinsic syntax is more familiar to C and C++ programmers. The Intel intrinsics names aren't good, but they are known identifiers. The problem with introducing new names is that you need hundreds of new identifiers.
- Documentation There is a convenient online guide provided by Intel: https://software.intel.com/sites/landingpage/IntrinsicsGuide/ Without that Intel documentation, it's impractical to write sizeable SIMD code.
Who is using it? intel-intrinsics
dg2d
is a very fast 2D renderer, twice as fast as Cairo- 18x faster SHA-256 vs Phobos with
intel-intrinsics
- Auburn Sounds audio products
- Cut Through Recordings audio products
Notable differences between x86 and ARM targets
- AArch64 and 32-bit ARM respects floating-point rounding through MXCSR emulation. This works using FPCR as thread-local store for rounding mode.
Some features of MXCSR are absent:
- Getting floating-point exception status
- Setting floating-point exception masks
- Separate control for denormals-are-zero and flush-to-zero (ARM has one bit for both)
- 32-bit ARM has a different nearest rounding mode as compared to AArch64 and x86. Numbers with a 0.5 fractional part (such as
-4.5
) may not round in the same direction. This shouldn't affect you.
Video introduction
In this DConf 2019 talk, Auburn Sounds:
- introduces how
intel-intrinsics
came to be, - demonstrates a 3.5x speed-up for some particular loops,
- reminds that normal D code can be really fast and intrinsics might harm performance
See the talk: intel-intrinsics: Not intrinsically about intrinsics
<img alt="Ben Franklin" src="https://raw.githubusercontent.com/AuburnSounds/intel-intrinsics/master/ben.jpg">
- Registered by ponce
- 1.9.1 released 2 years ago
- AuburnSounds/intel-intrinsics
- BSL-1.0
- Guillaume Piolat 2016-2021
- Dependencies:
- none
- Versions:
-
1.11.20 2024-Aug-13 1.11.19 2024-Jul-21 1.11.18 2024-Jan-03 1.11.17 2023-Dec-17 1.11.16 2023-Dec-03 - Download Stats:
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- Short URL:
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